1. Field of the Invention
The present invention relates to a metal-gate field effect transistor having a low resistance source-drain region and a method for manufacturing the same.
2. Description of the Related Art
A structure of this kind of metal-gate MISFET and a method for manufacturing such a metal-gate MISFET are disclosed in pp. 821-824 of IEDM Tech. Dig., 1997. FIG. 1 is a sectional view showing this conventional metal-gate field effect transistor. FIGS. 2A through 2E are sectional views showing a method for manufacturing the metal-gate field effect transistor in the order of the steps thereof.
As shown in FIG. 2A, after a dummy gate insulation film 6 is formed on a semiconductor substrate 1, a dummy gate electrode 2 is formed by the use of some material. Then, a low concentration source-drain region 5 is formed by means of ion implantation on the surface of the semiconductor substrate 1 by using this dummy gate electrode as a mask. After that, a side wall insulation film 3 is formed on a side wall of the gate electrode 2, and a high concentration source-drain region 4 is formed by means of ion implantation on the surface of the semiconductor substrate 1 by using as a mask this side wall insulation film 3. Incidentally, the gate electrode 2 and the side wall insulation film 3 are embedded in an insulation film 7, and the surface of the gate electrode 2 and the side wall insulation film 3 are made planar.
Subsequently, as shown in FIG. 2B, the dummy gate electrode 2 is removed.
Then, as shown in FIG. 2C, the gate insulation film 6 located below the gate electrode is removed.
Furthermore, as shown in FIG. 2D, the surface of the semiconductor substrate of the gate portion is subjected to oxidation thereby forming a gate insulation film 8.
After that, as shown in FIG. 2E, a metal film is formed on the whole surface of the semiconductor substrate 1 to embed the gate portion with this metal film followed by patterning this metal film with a photo-resist 10 thereby forming a metal-gate electrode 9 which is embedded in the gate portion.
Then, a metal-gate MISFET having a structure shown in FIG. 1 is formed by removing the photo-resist 10.
In this manner, conventionally, in the case where this kind of metal-gate MISFET is manufactured, the MISFET structure is formed in advance by using some material as the gate electrode 2 in order to form in self-alignment the gate electrode and the source-drain region. In the foregoing steps, after this dummy gate electrode 2 is removed, and the dummy gate insulation film 6 located below the dummy gate electrode 2 is removed, the gate oxidation is performed, and the metal is embedded therein to form a real metal-gate electrode 9.
However, this conventional metal-gate MISFET has a problem that a parasitic resistance of the source-drain region is large.
Supposing that a silicide film is formed on the source-drain region of the metal-gate field effect transistor as can be seen in the present invention, the parasitic resistance of the source-drain region can be lowered. However, in the conventional method, such a silicide film can not be formed on the source-drain region.
In other words, in the conventional method, when the metal-made gate electrode is formed followed by implanting ions to form the source-drain region by using the metal-made gate electrode as a mask for self-alignment, it is required to regulate a temperature for activating implanted ions to at most 800xc2x0 C. or so in order to avoid the melting of the metal. However, the activation of the implanted ions becomes insufficient at such a temperature of heat treatment. Besides, after the dummy gate electrode and the gate insulation film are removed, the presence of the silicide film on the source-drain region at the time of the gate oxidation leads to the deterioration of the electric characteristics owing to the oxidation of the silicide film. For such a reason, the silicide film could not be formed on the source-drain region of the conventional metal-gate MISFET.
An object of the present invention is to provide a metal-gate field effect transistor having a low parasitic resistance of the source and drain and a method for manufacturing the same.
A metal-gate field effect transistor according to a first aspect of the present invention comprises a metal-gate electrode formed on a semiconductor substrate, and a source-drain region formed on the surface of the semiconductor substrate on both sides of the metal-gate electrode, the transistor being characterized in that a cobalt silicide film is formed on the source-drain region.
A metal-gate field effect transistor according to a second aspect of the present invention comprises a metal-gate electrode formed on a semiconductor substrate, and a source-drain region formed on the surface of the semiconductor substrate on both sides of the metal-gate electrode, the transistor being characterized in that a conductive film formed of the same material as the metal-gate electrode is formed on the source-drain region.
A method for forming the metal-gate field effect transistor according to the first aspect of the present invention comprises the steps of:
forming a source-drain region of the surface of the semiconductor substrate, a dummy gate electrode and a dummy gate insulation film on the semiconductor substrate, and a silicide film on the source-drain region;
forming a sealing film such as silicon nitride or the like on the silicide film;
removing the dummy electrode and the dummy gate insulation film;
subjecting to oxidation the surface of the semiconductor substrate of the gate portion to form a gate oxide film; and
embedding a metal material in the gate portion to form the metal-gate electrode.
A method for manufacturing the metal-gate field effect transistor according to the second aspect of the present invention comprises the steps of:
forming a source-drain region of the surface of a semiconductor substrate, and a dummy gate electrode and a dummy gate insulation film on the semiconductor substrate;
removing the dummy gate electrode and the dummy gate insulation film;
subjecting to oxidation the surface of the substrate of the gate portion to form a gate oxide film;
depositing a titanium nitride film;
opening a region including at least a portion of an area on the source-drain region;
depositing a barrier metal film; and
simultaneously embedding the gate portion and the opening on the source-drain region to form the metal-gate electrode.
A method for manufacturing the metal-gate field effect transistor according to a third aspect of the present invention comprises the steps of:
forming the source-drain region of the surface of the semiconductor substrate, and a dummy gate electrode, a dummy gate insulation film and a silicon dioxide film on the semiconductor substrate;
forming a first sealing film such as silicon nitride or the like on the dummy gate electrode;
etching in self-alignment the silicon dioxide film on the source-drain region with respect to the gate electrode by using as a mask the side wall insulation film and the sealing film;
embedding an opening on the source-drain region with a metal to form a conductive film;
forming a second sealing film such as silicon nitride or the like on the surface of this conductive film;
exposing the surface of the dummy gate electrode;
removing the dummy gate electrode and the dummy gate insulation film and subjecting to oxidation the surface of the semiconductor substrate of the gate portion thereby forming a gate oxide film and embedding the gate portion with a metal to form a metal-gate electrode.
According to the present invention, since an upper portion of the silicide film is sealed with the sealing film such as silicon nitride or the like, the silicide film is not exposed to an atmosphere of the oxidation even when the silicide film is exposed to a high temperature with the result that the deterioration of the silicide film can be prevented.
Then, since the silicide film is present on the source-drain region, the parasitic resistance of the source-drain region can be reduced.
Furthermore, in the place of the silicide film, even when the conductive film formed of the same metal material as the gate electrode is formed on the source-drain region, the parasitic resistance of the source-drain region can be reduced.